Wang 700 Wire Braid ROM
The first Wang Wire-Braid ROMs were for the 700 series. The design and associated circuit board can accommodate 2048 addresses with up to 44 bits per address for a total of 90112 bits or 11.3k bytes. The 700 machines did not require the full storage capacity and the circuit boards were not fully populated.
700 series ROMs have transistor amplifiers on each sense coil, these produce pulse outputs in response to the ROM drive signal. The pulses are distributed throughout the logic engine and are latched as required within the logic engine.
Wang 700A ROM
The 700A ROM shown here is populated with 56 rows of address select diodes out of a possible 64 rows, the empty rows can be seen in the upper part of the photo. This loading of diodes defines 1792 addresses. The white blocks in the photo are the bit transformers, four bits to a block permitting a 44-bit wide word of which the 700 series microcode uses 43 bits. Therefore, this ROM stores 1792 x 43 = 77056 bits or 9.6k bytes.
The ROM has a date stamp of August 6 1971 and a version label of “P6B”. This ROM is ‘original design’ and does not have the ECNs that were applied to the 720A ROM described below.
Other known versions of the 700A ROM are P3A and P4A.
Wang 720A ROM
This ROM has 60 rows of address select diodes, four empty rows being visible in the photo. This loading defines 1920 ROM addresses of 43 bits, storing 82560 bits or 10.3k bytes.
The date stamp is illegible but the version label is “P720-2A”. Version 720-B1 is also known and Wang Service Notes suggest that people still running 720-2A ROMs should replace these with with version 720-B1 (!).
This ROM also incorporates the ECNs which appear to be intended to improve the sensing of data signals. The additional resistors have been added to the tops of the wire bundle binding posts, and some flying leads to accommodate the other changes.