Memory Address Fault

Since the machine remained faulty and the 6195 PCB was already on extenders, it seemed reasonable to verify that the MAT, MAU and MAV signals were correct. These signals are derived from the T, U and V registers and are latched to form the 12-bit RAM address. The MAV bits are also significant for being the display column address, so faults in generating MAT, MAU and MAV will disrupt RAM and display operation.

Memory Address testing with the 2-word ROM

A series of microinsttructions were set up on the ROM and the MAT, MAU and MAV lines were observed while each instruction ran in an endless loop.

RAM(15,15,KK)->CA, 0 + KK -> T
RAM(15,KK,V)->CA, 0 + KK -> V
RAM(T,U,V)->CA, 0 + KK -> V

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  MA1515KK5 01 (opens in new tab)

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  MA15KK6V 01 (opens in new tab)

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  MATUV V6 01 (opens in new tab)

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The final test code RAM(T,U,V)-> CA, 0+KK->V fails with the T and U parts of the address being 15, rather than reflecting the values in the T and U registers. The data that is selected for the T and U registers is controlled by the MOP field, MOP values are decoded by a pair of SN7442 BCD to decimal decoders and the decoded values pass through some combinatorial logic before controlling the selection of MAT, MAU and MAV.

Faulty MOP instruction decoder

Probing with the HP545A Logic Probe showed reasonable values in the combinatorial logic NOR gates. This logic is driven by a 7442 decimal decoder which should have only one active output for any combination of inputs. IC L20 on the 6195 PCB was faluty with multiple outputs becoming active simultaneously, thus breaking the data selection logic for MAT, MAU and MAV.

The SN7442 was replaced with a NOS IC.

Test: Positive progress

After replacing the faulty MOP operation decoder, the calculator microcode was tried again.

• PRIME, SET and VERIFY all gave partial illumination of some digits
• RECORD activated the tape relay, showed a flickering zero display, after five seconds or so dropped the relay and showed a different display of a few digits

This is a great improvement. A stable display of all digits is only possible on 600 series machines if the V-register is counted through all values, and the count is held stable for an extended period between increments - which requires a significant level of function from the ALU, conditional logic and memory.

Problem(s) remain, and more investigation is required.