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Wang 600 Technology

The 600 series machines were the first to use semiconductor RAM, Wang abandoning its historic association with magnetic core storage and adopting the very new technology of MOS RAM. IC technology was not quite ready to serve for the microcode ROM when the 600 was introduced and early numbers used wire braid ROM like the 700 series. Later numbers had MOS ROM to replace the large and expensive wire braid ROMs.

Hardware and Power

The 600 series shares many case and chassis components with the 700 series and as a result has a very similar form factor. The clicky, short travel keyboard design and the somewhat flimsy moulded resin case reflect Wang’s continued lack of interest in industrial design or aesthetic.

The power supply provides floating outputs of +12, -12, -11.5, +5 as well as +250 for the Panaplex. The + and - 12 are pretty crudely regulated with zeners and resistors. The -11.5 for the Mostel DRAMs and the +5 for the TTL chips have more sophisticated regulation based on the classic early 723 regulator IC. Both of these regulators use series-pass topology and are therefore vulnerable to over-voltage if the pass transistors were to fail shorted.

Voltage Clamps

Over-voltage on the -11.5 supply may damage the Mostek DRAMs and these are increasingly difficult to find. Over-voltage on the +5v could place several hundred TTL chips at risk.
With these risks in mind, a MOSFET voltage clamp was added to each of these supplies to prevent serious downstream damage in the event of pass transistor failure.


The electronics are realised with SSI TTL ICs mostly 74xx family, there are no MSI ICs. Eight double-sided 8cm x 24cm boards hold 20-30 ICs each with a total of nearly 250 ICs, depending on amount of RAM fitted. A 4MHz crystal oscillator drives the microcode engine which takes ten clocks to process each instruction, leading to a final timing of 400,000 microinstructions/second.

Data is mostly handled in a bit-serial fashion and passes through an ALU that can perform add, subtract, AND, OR and complement. There is very limited hardware support for peripherals - display refresh is performed by microcode and if the code does not run, there is no display. Printing likewise requires the microcode to send properly timed data streams to activate print hammers at the correct instant. Recording and decoding of casette tape data is also done entirely in microcode.

The RAM uses Mostek MK4008 DRAMS with RAM refresh controlled by microcode. Wang’s use of MOS DRAM was at the cutting edge of its day with 1k bit DRAMs only becoming available in 1971, during the development period of the 600 machines. The RAM PCB has pads for 16 ICs but only 4 ICs were fitted to the base model with added RAM being an extra cost option. RAM is organised as 4 pages of 1k x 4 bits, 1 page is installed in the base model with optional upgrades to 2 or 4 pages. In bytes this equates to 0.5k, 1k or 2k bytes. The microcode handles data as 4-bit nibbles or as a serial bitstream.

The wire braid ROM is a technical triumph of another kind - a triumph of precision construction to pack 10k bytes of ROM storage in a 30cm x 45cm x 3cm volume, even as microelectronic ROM was maturing. The ROM board decodes the address into 64 channels and each channel emits 32 fine copper wires which are routed through or beside 42 sense transformers, one transformer for each ROM data bit. At the start of each memory cycle a controlled current pulse is delivered to one wire as defined by the current ROM address. Where the wire passes through a sense transformer it will generate a brief secondary output while transformers that are bypassed will not generate an output pulse. These outputs are latched to form and hold the 42-bit ROM output word. Note that 64 x 32 = 2048 wires and each is approximately 60cm long. This results in 1.3km or three quarters of a mile of wire which must be threaded accurately and without breaks. Failure of a single wire or a single one of 2048 steering diodes will cause the ROM to lose a word. If this were to occur in the code fora little used function then the machine would crash in that function but if the word was in core microcode then the machine will most likely be rendered dead.


The 600 series has microcode that is similar to the 700 series. The control word is 42 bits wide (vs 43 bits in 700 series), the internal data paths and the ALU capabilities are very similar to the 700 series. The microcode ROM is 2048 42-bit words (86016 bits = 10752 bytes).

There is no instruction address register, instead each microcode word contains the address of the next word to be executed. Execution typically jumps from place to place rather than following an address sequence. Each microcode word assigns nine bits that define the upper bits of the ’next address’ and then two three-bit conditional fields. Each field reduces to 0 or 1 according to machine state at that instant. The effect is that each microcode instruction specifies a base location for the next instruction, but the exact address may be offset by 0, 1, 2 or 3 additional locations according to machine state. One further microcode bit acts as a subroutine flag, causing the current adress to be stored on a two-level LIFO hardware stack before proceeding to the next address. Thus 16 of 42 bits are dedicated to microcode sequencing leaving 26 bits for machine control.

The controllable functions are pretty basic being

  • selection of ALU source and destination
  • ALU operation - add, subtract, AND, OR, complement
  • load or store 4-bit values from RAM, ROM or peripherals
  • direct control of display, printer or tape

The biggest difference in 600 series microcode is the subroutine jump bit and associated 2 level hardware stack. This must have been a very valuable enhancement for the microcode authors.

All functions including keyboard scanning, computation, tape recording or decoding and print hammer firing are directly controlled by microcode with very little helper hardware. The display is generated by sequential loading of each digit from memory to the display driver and then a pause before the next digit is loaded. The refresh rate is approx 90Hz.

Any failure in ROM or microcode engine will result in a dead machine with dark display and no keyboard response. This makes fault-finding challenging because the majority of faults produce the same symptom - dead machine. Board swapping would be the fastest way to narrow into faults and without this option, fault-finding can be a slow process.