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Testing for ROM activity

With basic system timing signals verified the next step was to determine if there was any microcode activity.

Recall that there is no Program Counter as it typical with microprocessors. Instead, each microcode address contains the address of the next microcode to be executed. Pressing Prime forces execution to address zero and then to whatever addresses are specified in the code. To see if microcode is being executed it is necessary to monitor the address lines as they are presented to the microcode ROM.Monitoring the ROM address bus will show change in address values if the machine is attempting to run any microcode and the actual addresses being executed may give some further clues as to where faults may lie.

The Prime key forces address zero onto the address bus and the ROM will output the ’next address’ in fields JAD, JH and JL. Monitoring the address bus and the JAD, JH and JL fields provides a means to monitor what, if any, instructions the microcode engine is attempting to obey.

ROM Next Address Outputs: All Silent

The 6182 ROM Address board was put on extenders and instrumented to give access to the ROM address bus and the ’next address’ fields. The capture shows complete microcode execution cycles,

  • the first cycle has a zero ROM address in AD_LO and AD_HI
    • but there is no ’next address’ data output on JAD, JH and JL
  • subsequent cycles repeat the zero address and no ROM output data

This execution sequence is “correct” in that execution has correctly started at location zero, and location zero is specifying location zero as the next address to execute - hence an infinite loop at address zero.

It’s obvious that location zero should in fact be delivering an non-zero next address. We are fortunate to have access to a ROM transcript from Douglas Miller’s excellent Wang 600 Simulator. Referring to this transcript shows that ROM address zero should emit next address data of JAD = 0x1FC, JH = 0 and JL = 0.

The fact that all bits in three ROM fields are silent suggests a global kind of ROM failure. Any ROM failure is unwelcome since the ROM is the most complex and delicate component, and very likely the most impossible to repair.

Troubleshooting Silent ROM

Examining the ROM schematic showed only one feature likely cause a global failure of the ROM - the circuit that translated the CUP signal (already verified to be present) into a controlled current pulse that was injected into a selected ROM wire so as to generate data pulses from each output transformer that was included by that wire. Without a current pulse, no output bits could be generated and the ROM would appear silent.

Basic multimeter checks around this circuit showed that the nominal 12.8v supply to the drive circuit was actually 0v and R99 (33R 1W) was hot. Obvious culprits were C2 (100uF tantalum) or C5 (25uF tantalum). C5 was indeed short-circuit.

Replacing it restored the 12.8v supply to the current pulse generator.

Once again, aged tantalums going short-circuit are the culprit….

ROM Outputs Restored, Microcode Executes

Repeating the test above showed that the ROM now produced ’next address’ data after a Prime and that a series of different addresses were seen. Recall that the microcode engine does not use a Program Counter, so one does not expect to see the execution address simply incrementing. Instead, one should see that each successive ROM address has its upper bits nine as encoded by the JAD outputs of the previous instruction, and the lower two bits set according to machine state and the JH and JL fields of the previous instruction.

The capture shows that after address zero is forced into the AD HI and AD LO lines, execution goes to a new location and then continues by alternating between each of two further locations. This may represent being stuck in a tight loop, perhaps the result of further fault(s) that don’t allow normal execution to proceed.

By way of confirmation, the machine still did not produce a display, confirming that further faults existed.