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Casio AL-1000 Technology


Discrete Transistor Logic

Architecture, Memory & Speed

  • 14 displayed digits, 1 sign digit and one decimal position digit = 16 digit word
  • Digits encoded as 4-bit BCD, digit-serial processing over 4-bit internal bus
  • Core memory, 4 registers x 16 digits x 4 bits = 256 cores
  • @@kHz master clock, @@mS core cycle, @@mS full-number time


Ten double-sided boards plug into a hand-wired backplane.

Technical Analysis

The AL-1000 has been magnificently reverse-engineered, documented and analysed by Brent Hilpert.

He took his site down in 2017 and it does not appear to have been relocated. This is a great pity, his site contained a wealth of information and had been of enormous help to many in the vintage technology community. A copy of his AL-1000 reverse engineering is available in the Casio Data section.